Learning outcomes of the course unit: A student has knowledge on design, simulation, synthesis, verification and implementation of reconfigurable electronic systems based on high-level HDL (hardware description language) design methodology. Students gain practical skills of front-end synthesis and back-end physical implementation using different methods. Based on this, students are able to design a digital system (e.g. a control unit) and implement it to the field programmable gate array (FPGA) structure.
Students have skills to use common EDA (Electronic design automation) tools for design and implementation of reconfigurable digital systems.
Course Contents:
1. Motivation for reconfigurable electronic systems for space applications.
2. Field programmable gate arrays (FPGA).
3. Hardware description language (HLD) methodology of digital system design.
4.-5. Design of digital systems at different level of abstractions - logic level, register transfer level (RTL) and system level.
6. Digital system design flow.
7. Introduction to verification of digital systems.
8. Logic synthesis to FPGA, technology mapping.
9. Optimization constraints. Reconfiguration.
10.Physical implementation.
11-12. Design example of a control unit.
